Holistic Approach to Enabling Device Performance, Yield, and Reliability


Logic devices are getting smaller, and the introduction of 3D architectures that use vertical fins and nanowires in their gate design introduce more complexity to the fabrication process. As technology nodes shrink beyond 10 nm, new materials are required in both FEOL and BEOL processes to enable performance, yield, reliability and cost.

Holistic Approach Enabling Device Performance Yield and Reliability