Substrate Handling

Substrate Handling


As the global semiconductor industry races to address ever increasing market demands for smaller, more powerful, and technology-laden devices, manufacturers are facing processing challenges to improve yield and density while increasing layers and decreasing line widths to 10, 7, and 5 nanometers. Maintaining control of contaminants that include volatile organic compounds (VOC), moisture, and oxygen, provides the opportunity to improve yield in current and future processes.

With so much invested, protecting the purity, safety, and security of your valuable substrates is vital. As a carrier expert with in-depth knowledge of material sciences and process control, and a history of design and innovation, we understand the contamination challenges in each step of the wafer’s journey. From raw silicon, to work in process, to finished wafers, we help you realize bottom line profits with solutions that protect your investments from the front-end through to the back-end of the fab.

Front to Back End Solutions

Realizing Bottom Line Profits from Wafer Carrier Selection

This paper looks at the role of front-end to -back-end wafer handling carriers, advanced design criteria, and their impact on yields.

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