Silicon Carbide CMP Solutions
Silicon carbide (SiC) wafers are far from average. They require unique materials and processing methods compared to traditional silicon. All semiconductor manufacturing processes create defects in the SiC crystal that can degrade electron mobility. This leads to increased electrical resistance, reduced performance, and wasted power.
Chemical mechanical planarization (CMP) plays a key role in enabling high volume manufacturing for devices built on SiC substrates. As the demand for these devices increases, optimizing the CMP process becomes crucial to ensuring the desired surface quality and planarity required for device fabrication.
Featured Video
Bradley Wood, Entegris Applications Engineering Manager, outlines filter selection criteria in CMP process applications, focusing on the differences between silica and ceria abrasives. Whether you are setting up a new filtration system or working to improve an existing one, Entegris is here to help you make the best choice for optimized defect prevention. Runtime: 03:05
Featured White Paper
Solving CMP Challenges in High-Volume SiC Production
The semiconductor manufacturing process creates defects in the SiC crystal that can degrade mobility. Lower electron mobility, in turn, leads to increased electrical resistance, reduced performance, and wasted power. CMP plays a key role in ensuring devices built with SiC substrates can be manufactured in high volumes. As the demand for SiC-based devices increases, optimizing the CMP process becomes crucial to ensure the desired surface quality and planarity required for device fabrication
Featured Pictogram
Customizing CMP for Silicon Carbide Wafers
Pictorial explaining how Entegris' customized SiC slurry enables specialized CMP processes to cost effectively meet the automotive industry demands for higher operating voltages.
Featured Blog
Not Your Average Wafer: Solving CMP Challenges in High-Volume SiC Production
CMP is vital to high-volume chip production, and compound semiconductors like SiC are no exception. However, the SiC manufacturing process, as well as the material itself, pose some key challenges for CMP that must be addressed if the devices being produced are to achieve the chipmaker’s yield and throughput objectives.
Related Content
White Paper
Advanced CMP of Silicon Carbide for EVs and Power ICs
This paper describes challenges specific to CMP of SiC wafers and proposes solutions to improve SiC slurry performance and meet the needs of power IC manufacturers.
Pictogram
Finding CMP Synergies to Improve Wafer Performance, Yield, and Variability
Pictorial explaining how finding synergies between the slurries, components, filters, chemistries, conditioners, brushes, and monitoring tools used in CMP, and sourcing them from Entegris, can improve wafer performance, yield, and variability.
Webinar
Advanced CMP of Silicon Carbide for EVs and Power ICs
The first steps in fabricating SiC wafers involve grinding, lapping, and polishing the wafers to create the necessary surface properties before depositing active layers. The slurries used to carry out these steps, therefore, are becoming more critical.
In this webinar, you will learn about:
- The challenges specific to SiC polishing process
- Slurry performance improvement to address new technical challenges including increasing removal throughput, eliminating scratches, and low cost of ownership
- The benefits of offering an encompassing synergetic solution to improve yield
CMP Slurry Products
Minimize the impact of crystal growth defects and maximize high-quality wafer yield.
Thermoplastic polishing pads for silicon carbide (SiC) wafers offer the optimal balance of best-in-class performance, quality, and cost of ownership.
Best-in-class, bulk, point-of-tool, and point-of-dispense CMP slurry filter solutions to prevent micro-scratches and underlayer defects.
Precise control and measurement of process fluids for ultrapure applications in harsh environments.
High performance slurries for scalable manufacturing of atomically smooth and defect-free SiC wafers.
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